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CHELMSFORD, Mass., Oct. 6 /PRNewswire-FirstCall/ -- Mercury Computer Systems, Inc. (NASDAQ: MRCY) announced its Serial RapidIO(R)-to-PCIe Bridge IP(intellectual property) Core -- the first intelligent bridge of its kind inthe industry.
The Serial RapidIO-to-PCIe intelligent bridge features complete protocol translation, an optimized dual-channel multi-threaded DMA engine, and apipelined PCI Express-to-Rapid IO mapping table to address high-throughput streaming applications as both consumer and producer. It also provides avariety of system service features including mailbox message queueing, PCIeMSI/MSI-X interrupt controller, RapidIO-to-PCIe Atomic transaction encapsulation, access protection, real-time event counters, and error management.
"Interworking has always been a priority in the development of the RapidIO standard, and increasingly we see a demand among engineers to enable bridgingto a variety of standards-based interfaces," said Tom Cox , Executive Director of the RapidIO Trade Association. "With Mercury's new bridging IP, thesedesigners can take advantage of Serial RapidIO system-level capabilities while leveraging existing devices such as multicore processors, network processors,and FPGA-based computational elements."
Over the last two years, Mercury has established itself as the leading provider of system-level IP for Serial RapidIO interfaces, and hassuccessfully demonstrated IP working in a range of silicon technologies,including FPGA, structured ASIC, and ASIC implementations.
"This is a natural fit for a variety of applications in wireless infrastructure, storage, and embedded systems," said Tracy Richardson ,Director of the Silicon Solutions Group, for the Advanced Solutions business at Mercury. "Mercury's intelligent bridge IP core enables connectivity between processors that have only PCIe buses, to Serial RapidIO interfaces on DSPs from Freescale and TI, and Serial RapidIO switch fabrics from many vendors including Mercury."