How do you think the new GigE standards will influence the machine vision industry?
Respond or ask your question now!
By Philip Colet
This Application Note, submitted to Advanced Imaging by Dalsa (Waterloo, Ontario Can.), presents a case study on how designers at a leading semiconductor equipment company approached and achieved their high-speed and real-time goals when designing their next generation wafer inspection system. The company developed its new generation semiconductor wafer inspection system to inspect 200mm wafers for pattern defects and, for those wafers that have bumps for interconnects, to inspect the location, size, and heights of the bumps. This series also includes models to inspect 300mm wafers. Two-dimensional inspection is used for inspecting for pattern defects and for measuring bump location and diameter. Three-dimensional inspection is used for measuring bump height and coplanarity (variation in height) of bumps.
DALSA participated with, and supported, the company's designers with their development of the high-speed 2D image processing for defect inspection and bump location and size measurement.
The company developed a prior wafer inspection system using host based image processing. However, evolving technology and market demands required much higher speed, significantly improved capability for surface defect detection, scalability to facilitate a family of products to meet customer cost-performance requirements, and ease of software adaptations to meet customers special requirements. The design requirements can be summarized as:
Significantly, the combination of the first two requirements necessitated the power to acquire and process over 11 billion pixels per wafer.
High-speed image acquisition on semiconductor wafers is best performed with a line-scan camera. However, line-scan cameras require very intense illumination because of their short exposure times.