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LAS VEGAS , April 14, 2008 /PRNewswire-FirstCall/ -- NATIONAL ASSOCIATION OF BROADCASTERS SHOW -- A new multi-rate video clock generator with genlock from National Semiconductor Corp. (NYSE: NSM) delivers high-definition (HD) clock output jitter as low as 40 ps peak-to-peak. The LMH1982 provides reference clocks for video analog-to-digital converters (ADCs), digital-to-analog converters (DACs) and field-programmable gate array (FPGA) transceivers. These reference clocks ensure a system's 3-Gbps (3G), HD and standard-definition (SD) serial digital interface (SDI) output jitter is in compliance with the Society of Motion Picture and Television Engineers (SMPTE) video standards. National will demonstrate the LMH1982 at the NAB show in Las Vegas , April 14-17 at booth N1720.
The LMH1982's high-integration and small 5 mm by 5 mm package size simplifies the design of video cameras, digital recorders and a wide range of video editing and post-production equipment. The LMH1982 can replace discrete and FPGA phase-lock loops (PLLs) with multiple voltage controlled crystal oscillators (VCXOs), while offering low total power dissipation of 250 mW. Only one external VCXO is required to operate the LMH1982. The device can generate two simultaneous SD and HD output clocks and an output top of frame (TOF) timing pulse. In genlock mode, these output signals can be phase-locked to H and V sync signals applied to either of the reference ports.
The LMH1982's low-jitter output clocks are capable of driving FPGA serializers without the need for additional clock cleansing. The device's integrated PLLs can synchronize the output clocks to an analog timing reference from National's LMH1981 multi-format video sync separator or a digital timing reference from an SDI deserializer. The use of an external loop filter offers additional configurability to optimize rejection of reference input timing jitter.
Key Features - LMH1982 Video Clock Generator with Genlock
Offered in a small, space-saving 32-pin LLP(R) package, National's LMH1982 3G/HD/SD multi-rate video clock generator provides two simultaneous low-voltage differential signaling (LVDS) output clocks with selectable frequencies for SD (27 MHz or 67.5 MHz) and HD (74.25 MHz, 74.25/1.001 MHz, 148.5 MHz or 148.5/1.001 MHz) resolutions. The LMH1982 supports NTSC/525i, PAL/625i, 525p, 625p, 720p, 1080i and 1080p video timing. An I2C compatible bus interface is included for programming device registers and reading device status. The LMH1982 operates from 3.3V and 2.5V supplies.
Pricing and Availability
Samples of the LMH1982 are available now, with high-volume quantities
scheduled to be available the end of May 2008 . The LMH1982 is priced at